NCV7329 LIN Slave SyncBreak signal triggering and bus access

Customer:

How do I trigger/release the SyncBreak signal to grab the line and talk to the master?

Originally submitted via email support on 22 August 2025. Migrated to the forum for community visibility.

Soldered Support:

LIN protocol requires a SyncBreak at the start of every frame to mark the start of a new transmission. It requires a dominant low (LOW on TxD) signal on the bus for at least 13 bit times followed by a break delimiter (return TxD HIGH). Then Sync byte 0x55 is sent for baudrate sync followed by frame ID and then data. RPi as a slave waits for 0x55 (Sync) from master and reads the next byte ID. If ID matches the slave’s assigned frame, the Pi reacts.

Baud rate must match master (timing is important).

Example part of code:

# Setup
EN_PIN = 18
GPIO.setmode(GPIO.BCM)
GPIO.setup(EN_PIN, GPIO.OUT)
GPIO.output(EN_PIN, GPIO.HIGH)

# Open UART, match master baudrate
ser = serial.Serial("/dev/serial0", baudrate=19200, timeout=0.1)

MY_FRAME_ID = YOUR FRAME ID (depends on master)

while True:
 b = ser.read(1)
 if not b:
  continue

 byte_val =

 # Detect SYNC
 if byte_val == 0x55:
  # Next byte should be ID
  pid = ser.read(1)
  if not pid:
   continue
  pid_val =

  print(f" ")

  # If ID matches - respond
  if pid_val == MY_FRAME_ID_BYTE:
   ...

For more information, see the NCV7329 documentation.

Customer:

I checked all connections again, physically and virtually (UART ports), with no result. I get no messages at all. The LIN breakout module (Slave) doesn’t appear to start or open anything—it looks as if the ENABLE pin is down, even though it’s connected to a GPIO output set to HIGH.

Another possibility is that my Master doesn’t accept the Slave’s ID and excludes it from communication. Is there any Slave ID hardcoded and sent unsolicited to the Master? If so, can this ID be set?

Also, regarding LIN slaves interrupting the Master’s communication: to grab the bus line and make the Master listen, you need to send a specific bit pattern (not a real value like 0x55) known as a SyncBreak before sending your reply message. A SyncBreak breaks normal protocol communication and re-synchronizes participants to the upcoming message.

The conditions for a successful SyncBreak are:

  • Set at least 13-16 bits of logical value 0 (low line, dominant) for approximately 1ms
  • Followed by 1 bit of logical value 1 (high line, recessive) for approximately 0.5ms
  • Send within 3-10ms after the last byte received

These are not easy to implement in software on a RPi4. Does the LIN breakout not have any hardwired specifics to accomplish this?

Attachment omitted in migration: image002.jpg

Soldered Support:

To better help, can you confirm your system setup: you have a RPi4 connected to the LIN breakout board through UART, and the board is connected to an external LIN bus with a Master controlling the nodes. A full view of the system can help identify the problem.

Regarding connections and LIN power: the LIN IC supports max voltage up to +42V, but this does not necessarily mean you should provide that. LIN protocol usually works in the range of 5-18V. Providing 22V may compromise normal communication.

Regarding bus access: a LIN Slave device by itself cannot “interrupt” or initiate communication. Slaves simply listen for IDs. The LIN bus is controlled entirely by the Master, which sends frames divided into a header part for syncing and identification and a response part.